Machine Learning and Non-Volatile Memories
Machine Learning and Non-Volatile Memories
After reviewing the basics of machine learning in Chapter 1, Chapter 2 shows how neural networks can mimic the human brain; to accomplish this result, neural networks have to perform a specific computation called vector-by-matrix (VbM) multiplication, which isparticularly power hungry. In the digital domain, VbM is implemented by means of logic gates which dictate both the area occupation and the power consumption; the combination of the two poses serious challenges to the hardware scalability, thus limiting the size of the neural network itself, especially in terms of the number of processable inputs and outputs. Non-volatile memories (phase change memories in Chapter 3, resistive memories in Chapter 4, and 3D flash memories in Chapter 5 and Chapter 6) enable the analog implementation of the VbM (also called "neuromorphic architecture"), which can easily beat the equivalent digital implementation in terms of both speed and energy consumption. SSDs and flash memories are strictly coupled together; as 3D flash scales, there is a significant amount of work that has to be done in order to optimize the overall performances of SSDs. Machine learning has emerged as a viable solution in many stages of this process. After introducing the main flash reliability issues, Chapter 7 shows both supervised and un-supervised machine learning techniques that can be applied to NAND. In addition, Chapter 7 deals with algorithms and techniques for a pro-active reliability management of SSDs. Last but not least, the last section of Chapter 7 discusses the next challenge for machine learning in the context of the so-called computational storage. No doubt that machine learning and non-volatile memories can help each other, but we are just at the beginning of the journey; this book helps researchers understand the basics of each field by providing real application examples, hopefully, providing a good starting point for the next level of development.
Author: Rino Micheloni
Publisher: Springer
Published: 05/27/2023
Pages: 161
Binding Type: Paperback
Weight: 0.60lbs
Size: 9.21h x 6.14w x 0.40d
ISBN: 9783031038433
About the Author
Dr. Rino Micheloni is a Research Fellow at the University of Ferrara, Italy. Before that, he was Vice-President and Fellow at Microsemi/Microchip Corporation, where he established the Flash Signal Processing Labs in Milan, Italy, with special focus on NAND Flash technology characterization, machine learning techniques for improving memory reliability, and error correction codes. Prior to joining Microsemi, he was Fellow at PMC-Sierra, working on NAND Flash technology characterization, LDPC, and NAND Signal Processing as part of the team developing flash controllers for PCIe SSDs. Before that, he was with Integrated Device Technology (IDT) as Lead Flash Technologist, driving the architecture and design of the BCH engine in the world's first PCIe NVMe SSD controller. Early in his career, he led NAND design teams at STMicroelectronics, Hynix, and Infineon; during this time, he developed the industry's first MLC NOR device with embedded ECC technology and the industry's first MLC NAND with embedded BCH.
Dr. Micheloni is IEEE Senior Member, he has co-authored 100 publications in peer-reviewed journals and international conferences, and he holds 291 patents worldwide (including 139 US patents). He received the STMicroelectronics Exceptional Patent Award in 2003 and 2004, the Infineon IP Award in 2007, and he was elected to the PMC-Sierra Inventor Wall of Fame in 2013. In 2020, Dr. Micheloni was selected for the European Inventor Award.